HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 843

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

24.3.12 Hc Bulk Current ED Register (USBHBCED)
USBHBCED includes a physical address of current ED in the Bulk List. When the bulk list is
supplied by the round robin method, endpoints are ordered to the list according to these insertions.
24.3.13 Hc Done Head ED Register (USBHDHED)
USBHDHED includes a physical address of finally completed TD added to Done queue. The host
controller driver needs not read this register so that the content is written to HCCA periodically in
normal operation.
24.3.14 Hc Fm Interval Register (USBHFI)
USBHFI includes a 14-bit value indicating the bit time interval of the frame (i.e., between two
serial SOFs) and a 15-bit value indicating the maximum packet size at a full speed that is
transmitted and received by the host controller without causing scheduling overrun. The host
controller driver adjusts the frame interval minutely by writing a new value over the current value
in each SOF.
Bit
31 to 4
3 to 0
Bit
31 to 4
3 to 0
Bit Name
BCED27 to
BCED0

Bit Name
DH27 to
DH0

Initial
Value
All 0
All 0
Initial
Value
All 0
All 0
R/W
R
R/W
R
R
R/W
Description
BCED
Physical address of current ED in the Bulk List
Reserved
These bits are always read as 0. The write value should
always be 0.
Description
DH
Physical address of finally completed TD added to Done
queue
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 3.00 Jan. 18, 2008 Page 781 of 1458
Section 24
USB Host Controller (USBH)
REJ09B0033-0300