HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1118

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 31
31.3.20 Interrupt Control Register 2 (INTCR2)
The INTCR2 enables or disables an interrupt.
Rev. 3.00 Jan. 18, 2008 Page 1056 of 1458
REJ09B0033-0300
Bit
2
1
0
Bit
7
6 to 1
0
Bit Name
INTRQ3E 0

FRDYIE
Bit Name
SET2
SET1
SET0
MultiMediaCard Interface (MMCIF)
Initial
Value
0
0
0
Initial
Value
All 0
0
R/W
R/W
R/W
R/W
R/W
R/W

R/W
Description
Sets DMA request signal assert condition.
000: Not output (Initial value)
001: FIFO remained data is 1/4 or less of FIFO capacity.
010: FIFO remained data is 1/2 or less of FIFO capacity.
011: FIFO remained data is 3/4 or less of FIFO capacity.
100: FIFO remained data is at least 1 byte.
101: FIFO remained data is 1/4 or more of FIFO capacity.
110: FIFO remained data is 1/2 or more of FIFO capacity.
111: FIFO remained data is 3/4 or more of FIFO capacity.
Description
int_frdy_nb Interrupt Enable
0: Interrupt disabled
1: Interrupt enabled
Reserved
These bits are always read as 0. The write value should
always be 0.
FIFO Preparation End Flag Enable
0: Disables FIFO preparation end flag set
1: Enables FIFO preparation end flag set