HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1116

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 31
31.3.16 VDD/Open-Drain Control Register (VDCNT)
VDCNT can use MMC_ODMOD signal to control open drain. The MMC_VDDON signal output
can be used to control the MMC power supply (VDD) on/off.
31.3.17 Data Register (DR)
DR is a register for reading/writing FIFO data.
Word/byte access is enabled to addresses of this register.
Rev. 3.00 Jan. 18, 2008 Page 1054 of 1458
REJ09B0033-0300
Bit
7
6
5 to 0
Bit
15 to 0
(7 to 0)
Bit Name
VDDON
ODMOD
Bit Name
DR
MultiMediaCard Interface (MMCIF)
Initial
Value
0
0
All 0
Initial
Value
Undefined
R/W
R/W
R/W
R/W
R/W
Specifies MMC_ODMOD signal to be used to control
Description
Specifies MMC_VDDON signal to be used as a MMC
power supply (VDD) control signal.
0: MMC_VDDON is low signal output
1: MMC_VDDON is high signal output
CMD output open drain in MMC mode.
0: MMC_ODMOD signal is low signal output
1: MMC_ODMOD signal is high signal output
Reserved
These bits are always read as 0. The write value should
always be 0.
Description
Register for reading/writing FIFO data.
Word/byte access is enabled. However, byte access is
disabled to address 2n+1.