HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 757

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit
9
8
7, 6
Bit Name
RFFUL
RDREQ

Initial
Value
0
0
All 0
R/W
R
R
R
Description
Receive FIFO Full
0: Receive FIFO not full
1: Receive FIFO full
•
•
•
Receive Data Transfer Request
0: Indicates that the size of valid space in the receive
1: Indicates that the size of valid space in the receive
A receive data transfer request is issued when the valid
space in the receive FIFO exceeds the size specified by
the RFWM bit in SIFCTR.
When using receive data transfer through the DMAC, this
bit is always cleared by one DMAC access. After DMAC
access, when conditions for setting this bit are satisfied,
the SIOF again indicates 1 for this bit.
•
•
•
Reserved
These bits are always read as 0. The write value should
always be 0.
FIFO does not exceed the size specified by the RFWM
bit in SIFCTR.
FIFO exceeds the size specified by the RFWM bit in
SIFCTR.
This bit is valid when the RXE bit in SICTR is 1.
This bit indicates a state; if SIRDR is read, the SIOF
clears this bit.
If the issue of interrupts by this bit is enabled, an
SIOF interrupt is issued.
This bit is valid when the RXE bit in SICTR is 1.
This bit indicates a state; if the size of valid space in
the receive FIFO is less than the size specified by the
RFWM bit in SIFCTR, the SIOF clears this bit.
If the issue of interrupts by this bit is enabled, an
SIOF interrupt is issued.
Rev. 3.00 Jan. 18, 2008 Page 695 of 1458
Section 21
Serial I/O with FIFO (SIOF)
REJ09B0033-0300