HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 104

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 2
CPU
2.3
Register Descriptions
This LSI provides thirty-three 32-bit registers: 24 general registers, five control registers, three
system registers, and one program counter.
(1) General Registers
This LSI incorporates 24 general registers: R0_BANK0 to R7_BANK0, R0_BANK1 to
R7_BANK1 and R8 to R15. R0 to R7 are banked. The process mode and the register bank (RB)
bit in the status register (SR) define which set of banked registers (R0_BANK0 to R7_BANK0 or
R0_BANK1 to R7_BANK1) are accessed as general registers.
(2) System Registers
This LSI incorporates the multiply and accumulate registers (MACH/MACL) and procedure
register (PR) as system registers. These registers can be accessed regardless of the processing
mode.
(3) Program Counter
The program counter stores the value obtained by adding 4 to the current instruction address.
(4) Control Registers
This LSI incorporates the status register (SR), global base register (GBR), save status register
(SSR), save program counter (SPC), and vector base register as control register. Only the GBR can
be accessed in user mode. Control registers other than the GBR can be accessed only in privileged
mode.
Rev. 3.00 Jan. 18, 2008 Page 42 of 1458
REJ09B0033-0300