DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 107

IC H8S/2170 MCU FLASH 100-TQFP

DF2170BVTE33V

Manufacturer Part Number
DF2170BVTE33V
Description
IC H8S/2170 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2170BVTE33V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2170BVTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Interrupt Acceptance Control and 3-Level Control: In interrupt control modes 0 and 1,
interrupt acceptance control and 3-level mask control is performed by means of the I and UI bits in
CCR and ICR (control level).
Table 5.5 shows the interrupts that can be accepted in each interrupt control mode.
Table 5.5
[Legend]
:
Note:
Default Priority Determination: The priority is determined for the selected interrupt, and a
vector number is generated.
If the same value is set for ICR, acceptance of multiple interrupts is enabled, and so only the
interrupt source with the highest priority according to the preset default priorities is selected and
has a vector number generated.
Interrupt sources with a lower priority than the accepted interrupt source are held pending.
Table 5.6 shows operations and control signal functions in each interrupt control mode.
Table 5.6
[Legend]
O:
IM:
PR:
:
Interrupt
Control Mode
0
1
Interrupt Control Mode I Bit
0
1
*
Interrupt operation control performed
Used as an interrupt mask bit
Sets priority
Not used
Don't care
Interrupt control level 1 has priority.
Interrupts Acceptable in Each Interrupt Control Mode
Operations and Control Signal Functions in Each Interrupt Control Mode
INTM1 INTM0
0
Setting
0
1
0
1
0
1
O
O
Interrupt Acceptance Control
UI Bit
0
1
I
IM
IM
3-Level Control
NMI, Address Break Peripheral Module Interrupt
O
O
O
O
O
UI
IM
ICR
PR
PR
Rev. 2.00, 03/04, page 73 of 534
O (All interrupts)*
X
O (All interrupts)*
O (Interrupts with ICR = 1)
X
Default Priority
Determination
O
O
T (Trace)

Related parts for DF2170BVTE33V