DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 565

• Manufacturer Part Number: DF2170BVTE33V
• Description: IC H8S/2170 MCU FLASH 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170BVTE33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

8-Bit Timer (TMR) ................................. 263
Address Map............................................. 53
Address Space..................................... 16, 20
Addressing Mode...................................... 40
Bcc...................................................... 29, 37
Boot Mode .............................................. 401
Bulk-In Transfer ..................................... 351
Bulk-Out Transfer................................... 349
Bus Arbitration ....................................... 151
Bus Controller (BSC) ............................... 83
Post-Increment...................................... 41
Assertion Period.................................. 121
16-Bit Counter Mode.......................... 274
Cascaded Connection.......................... 274
Compare Match Count Mode ............. 275
Pulse Output ....................................... 270
TCNT Incrementation Timing ............ 271
Toggle output...................................... 279
Absolute Address.................................. 41
Immediate ............................................. 42
Memory Indirect ................................... 42
Program-Counter Relative .................... 42
Register Direct...................................... 41
Register Indirect ................................... 41
Register Indirect with Displacement..... 41
Register Indirect with
Register indirect with pre-decrement.... 41
Basic Timing....................................... 110
Chip Select Signals ............................. 108
Data Size and Data Alignment............ 109
Extension of Chip Select (CS)
Read Strobe (RD) Timing................... 120
Valid Strobes ...................................... 110
Wait Control ....................................... 119
Index
Clock Pulse Generator ............................ 463
Communications Protocol....................... 437
Condition Field ......................................... 39
Condition-Code Register (CCR) ............... 24
Control Transfer...................................... 343
CPU Operating Modes.............................. 16
Crystal Resonator.................................... 463
Data direction register............................. 219
Data register............................................ 219
DMA Controller (DMAC) ...................... 153
DMA Transfer Specifications ................. 358
DRAM Interface ..................................... 122
Effective Address................................ 40, 44
effective address extension ....................... 39
Effective Address Extension..................... 39
Error Protection....................................... 429
Exception Handling .................................. 55
Exception Handling Vector Table............. 56
Extended Control Register (EXR) ............ 23
Flash MAT Configuration....................... 377
General Registers ...................................... 22
Hardware Protection ............................... 428
Advanced Mode .................................... 18
Normal Mode ........................................ 16
Channel Priority .................................. 186
Dual Address Mode ............................ 189
Interrupt Sources................................. 213
Repeat Area Function ......................... 179
Single Address Mode .......................... 196
Transfer Modes ................................... 171
Rev. 2.00, 03/04, page 531 of 534