DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 230

• Manufacturer Part Number: DF2170BVTE33V
• Description: IC H8S/2170 MCU FLASH 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170BVTE33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

7.4.10
Single Address Mode (Read): Figure 7.24 shows an example of transfer when TEND output is
enabled, and byte-size, single address mode transfer (read) is performed from external 8-bit, 2-
state access space to an external device.
Figure 7.25 shows an example of transfer when TEND output is enabled, and word-size, single
address mode transfer (read) is performed from external 8-bit, 2-state access space to an external
device.
After one byte or word has been transferred in response to one transfer request, the bus is released.
While the bus is released, one or more CPU bus cycles are initiated.
Rev. 2.00, 03/04, page 196 of 534
φ
Address bus
Bus release
φ
Address bus
DMAC Bus Cycles (Single Address Mode)
Figure 7.25 Example of Single Address Mode (Word Read) Transfer
Figure 7.24 Example of Single Address Mode (Byte Read) Transfer
Bus release
DMA read
DMA read
Bus release
Bus release
DMA read
Bus release
DMA read
DMA read
Bus release
Bus release
DMA read
Last transfer cycle
transfer
cycle
Last
DMA read
Bus release
Bus
release