DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 214

• Manufacturer Part Number: DF2170BVTE33V
• Description: IC H8S/2170 MCU FLASH 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170BVTE33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

the repeat area function is used, the operation that restores the address register value to the buffer
start address is performed automatically within the DMAC.
The repeat area function can be set independently for the source address register and the
destination address register. The source address repeat area is specified by bits SARA4 to SARA0
in DMACR, and the destination address repeat area by bits DARA4 to DARA0 in DMACR. The
size of each repeat area can be specified independently.
When the address register value is the last address in the repeat area and repeat area overflow
occurs, DMA transfer can be temporarily halted and an interrupt request sent to the CPU. If the
SARIE bit in DMACR is set to 1, when the source address register overflows the repeat area, the
IRF bit is set to 1 and the DA bit cleared to 0 in DMMDR, and transfer is terminated. If DIE = 1 in
DMMDR, an interrupt is requested. If the DARIE bit in DMACR is set to 1, the above applies to
the destination address register.
If the DA bit in DMMDR is set to 1 during interrupt generation, transfer is resumed. Figure 7.9
illustrates the operation of the repeat area function.
Rev. 2.00, 03/04, page 180 of 534
When lower 3 bits (8-byte area) of DMSAR are designated as repeat area
(SARA4 to SARA0 = 3)
Figure 7.9 Example of Repeat Area Function Operation
External memory
H'23FFFE
H'23FFFF
H'240000
H'240001
H'240002
H'240003
H'240004
H'240005
H'240006
H'240007
H'240008
H'240009
:
:
DMSAR values
H'240000
H'240001
H'240002
H'240003
H'240004
H'240005
H'240006
H'240007
Range of
Repeated
Repeat area overflow
interrupt can be
requested