DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 132

IC H8S/2170 MCU FLASH 100-TQFP

DF2170BVTE33V

Manufacturer Part Number
DF2170BVTE33V
Description
IC H8S/2170 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2170BVTE33V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2170BVTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
6.3.8
REFCR specifies DRAM interface refresh control.
Rev. 2.00, 03/04, page 98 of 534
Bit
1
0
Bit
15
14
Bit Name
RCD1
RCD0
Bit Name
CMF
CMIE
Refresh Control Register (REFCR)
Initial
Value
0
0
Initial
Value
0
0
R/W
R/W
R/W
R/W
R/(W)* Compare Match Flag
R/W
Description
RAS-CAS Wait Control
These bits select a wait cycle to be inserted between
the RAS assert cycle and CAS assert cycle.
00: Wait cycle not inserted
01: 1-state wait cycle inserted
10: 2-state wait cycle inserted
11: 3-state wait cycle inserted
Description
Status flag that indicates a match between the values of
RTCNT and RTCOR.
[Clearing conditions]
[Setting condition]
When RTCOR = RTCNT
Compare Match Interrupt Enable
Enables or disables interrupt requests (CMI) by the
CMF flag when the CMF flag is set to 1.
This bit is valid when refresh control is not performed
(RFSHE = 0). When the refresh control is performed
(RFSHE = 1), this bit is always cleared to 0 and cannot
be modified.
0: Interrupt request by CMF flag disabled
1: Interrupt request by CMF flag enabled
When 0 is written to CMF after reading CMF = 1
while the RFSHE bit is cleared to 0
When CBR refreshing is executed while the RFSHE
bit is set to 1

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