DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 114

IC H8S/2170 MCU FLASH 100-TQFP

DF2170BVTE33V

Manufacturer Part Number
DF2170BVTE33V
Description
IC H8S/2170 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2170BVTE33V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2170BVTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
5.6.4
Table 5.7 shows interrupt response times − the intervals between generation of an interrupt request
and execution of the first instruction in the interrupt handling routine. The execution status
symbols used in table 5.7 are explained in table 5.8.
Table 5.7
Notes: 1. Two states in case of internal interrupt.
Table 5.8
[Legend]
m:
Rev. 2.00, 03/04, page 80 of 534
No.
1
2
3
4
5
6
Symbol
Instruction fetch S
Branch address read S
Stack manipulation S
Number of wait states in external device access.
Execution Status
instruction ends*
Internal processing*
Interrupt priority determination*
Number of wait states until executing
PC, CCR stack save
Vector fetch
Instruction fetch*
2. Refers to MULXS and DIVXS instructions.
3. Prefetch after interrupt acceptance and prefetch of interrupt handling routine.
4. Internal processing after interrupt acceptance and internal processing after vector fetch.
Interrupt Response Times
Total (using on-chip memory)
Interrupt Response Times
Number of States in Interrupt Handling Routine Execution Status
I
K
J
2
3
4
Internal
Memory
1
1
2-State
Access
4
Advanced Mode
3
1 to (19 + 2·S
2·S
2·S
2·S
2
12 to 32
K
I
I
Object of Access
8-Bit Bus
3-State
Access
6 + 2m
External Device
I
)
2-State
Access
2
16-Bit Bus
3-State
Access
3 + m

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