DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 417

IC H8S/2170 MCU FLASH 100-TQFP

DF2170BVTE33V

Manufacturer Part Number
DF2170BVTE33V
Description
IC H8S/2170 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2170BVTE33V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2170BVTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit
4
Bit Name
FLER
Initial
Value
0
R/W
R
Description
Flash Memory Error
Indicates an error occurs during programming and
erasing flash memory. When FLER is set to 1, flash
memory enters the error protection state.
When FLER is set to 1, high voltage is applied to the
internal flash memory. To reduce the damage to flash
memory, the reset must be released after the reset
period of 100 µs which is longer than normal.
0: Flash memory operates normally.
[Clearing condition]
1: An error occurs during programming/erasing flash
[Setting conditions]
Programming/erasing protection for flash memory
(error protection) is invalid.
memory.
Programming/erasing protection for flash memory
(error protection) is valid.
At a reset or in hardware standby mode
When an interrupt, such as NMI, occurs during
programming/erasing flash memory.
When the flash memory is read during
programming/erasing flash memory (including a
vector read or an instruction fetch).
When the SLEEP instruction is executed during
programming/erasing flash memory (including
software-standby mode)
When a bus master other than the CPU, such as the
DMAC, gets bus mastership during
programming/erasing flash memory.
Rev. 2.00, 03/04, page 383 of 534

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