DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 224

• Manufacturer Part Number: DF2170BVTE33V
• Description: IC H8S/2170 MCU FLASH 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170BVTE33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

In burst mode, one-byte, one-word, or one-longword transfers are executed continuously until
transfer ends. Once burst transfer starts, requests from other channels, even of higher priority, are
held pending until transfer ends.
If an NMI interrupt is generated while a channel designated for burst transfer is enabled for
transfer, the DA bit is cleared and transfer is disabled. If a burst transfer has already been initiated
within the DMAC, the bus is released on completion of the currently executing byte or word
transfer, and burst transfer is aborted. If the last transfer cycle in burst transfer has been initiated
within the DMAC, transfer is executed to the end even if the DA bit is cleared.
Normal Transfer Mode (Cycle Steal Mode: Transfer Source is USB): Figure 7.17 shows an
example of transfer when USB transfer is enabled, and word-size, normal transfer mode (cycle
steal mode) is performed from the FIFO in the USB to external 16-bit, 2-state access space.
Rev. 2.00, 03/04, page 190 of 534
φ φ
Address bus
USB read
(internal signal)
φ
Address bus
Figure 7.17 Example of Normal Transfer Mode (Cycle Steal Mode) Transfer
Figure 7.16 Example of Normal Transfer Mode (Burst Mode) Transfer
Bus
release
DMA read DMA write Bus release DMA read DMA write
USB
DMA read DMA write DMA read DMA write DMA read DMA write
External
memory
(Transfer Source: USB)
Burst transfer
USB
External
memory
Bus release
Last transfer cycle
DMA read DMA write
USB
External
memory
Bus
release