DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 131

• Manufacturer Part Number: DF2170BVTE33V
• Description: IC H8S/2170 MCU FLASH 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170BVTE33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

6.3.7
DRACCR is used to set the DRAM interface bus specifications.
Bit
7, 6
5
4
3, 2
Bit Name

TPC1
TPC0

DRAM Access Control Register (DRACCR)
Address
RAST = 0 RAS
RAST = 1 RAS
UCAS, LCAS
(2-State Column Address Output Cycle, Full Access)
Initial
Value
All 0
0
0
All 0
Figure 6.4 RAS Signal Assertion Timing
R/W
R/W
R/W
R/W
R/W
T
p
Row address
Reserved
These bits can be read from or written to. However, the
write value should always be 0.
Precharge State Control
These bits select the number of states in the RAS
precharge cycle in normal access and refreshing.
00: 1 state
01: 2 states
10: 3 states
11: 4 states
Reserved
These bits can be read from or written to. However, the
write value should always be 0.
Description
T
r
Bus cycle
T
c1
Column address
Rev. 2.00, 03/04, page 97 of 534
T
c2