DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 173

• Manufacturer Part Number: DF2170BVTE33V
• Description: IC H8S/2170 MCU FLASH 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170BVTE33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Self-Refreshing: A self-refresh mode (battery backup mode) is provided for DRAM as a kind of
standby mode. In this mode, refresh timing and refresh addresses are generated within the DRAM.
To select self-refreshing, set the RFSHE bit and SLFRF bit to 1 in REFCR. When a SLEEP
instruction is executed to enter software standby mode, the CAS and RAS signals are output and
DRAM enters self-refresh mode, as shown in figure 6.40.
If a CBR refresh request occurs when making a transition to software standby mode, CBR
refreshing is executed, then self-refresh mode is entered.
In some DRAMs provided with a self-refresh mode, the RAS signal precharge time immediately
after self-refreshing is longer than the normal precharge time. A setting can be made in bits
TPCS2 to TPCS0 in REFCR to make the precharge time immediately after self-refreshing from 1
to 7 states longer than the normal precharge time. In this case, too, normal precharging is
performed according to the setting of bits TPC1 and TPC0 in DRACCR, and therefore a setting
should be made to give the optimum post-self-refresh precharge time, including this time. Figure
6.41 shows an example of the timing when the precharge time immediately after self-refreshing is
extended by 2 states.
φ
(
(
,
)
)
T
Rp
Figure 6.40 Self-Refresh Timing
T
Rr
High
Software
standby
Rev. 2.00, 03/04, page 139 of 534
T
Rc3