DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 392

• Manufacturer Part Number: DF2170BVTE33V
• Description: IC H8S/2170 MCU FLASH 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170BVTE33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

12.5.9
This section describes the tree configuration of this module. The USB determines the tree
configuration in the function using three parameters such as Configuration, Interface, and
Alternate. The tree configuration of this module is shown in table 12.3.
Table 12.3 Tree Configuration
12.5.10 Power Supply Specification
This module functions by self power supply. The bus power supply supplied from the USB cable
is not available.
12.6
• PKTE2 Operation (EP2)
Rev. 2.00, 03/04, page 358 of 534
EP Number
0
1
2
3
When DMA transfer is performed on EP2 transmit data, the USB module automatically
performs the same processing as writing the number of transmit data to PKTE2 if one data
FIFO (maximum packet size) becomes full. Accordingly, to transfer data of integral multiples
of the maximum packet size, the user needs not to write the number of transmit data in PKTE2.
To transfer data of less than the maximum packet size, the user must write the number of
transmit data in PKTE2 using the DMA transfer end interrupt of the DMAC. If the user writes
the number of transmit data in PKTE2 in cases other than the case when data of less than the
maximum packet size is transferred, excess transfer occurs and correct operation cannot be
guaranteed.
Figure 12.15 shows an example for transmitting 1050 bytes of data from EP1 to the host in
high-speed mode. In this case, internal processing as the same as writing the number of
transmit data to PKTE2 is automatically performed twice. This kind of internal processing is
performed when the currently selected data FIFO becomes full. Accordingly, this processing is
automatically performed only when the maximum packet size of data is transmitted. This
processing is not performed automatically when data less than the maximum packet size is
transmitted.
Tree Configuration
Notes on Using DMA
Conf.

1
1
1
Int.

0
0
0
Alt.

0
0
0
Transfer
Method
Control
Bulk
Bulk
Interrupt
Transfer
Direction
In/Out
Out
In
In