PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 101

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

DTE-A is receiving data and its receive FIFO threshold is reached, the RTS signal goes
in-active ’HIGH’ forcing the CTS of DTE-B to become in-active indicating that
transmission has to stop after finishing the current character. Both DTE devices should
also be using the CTS signal to flow control their transmitters. When the shadow receive
FIFO in DTE-A is cleared its RTS goes active (low) and this signals the far end DTE-B
to resume transmission. Data flow control from DTE-B to DTE-A works in the same way.
Figure 47
Data Sheet
DTE A
Out-of-Band DTE-DTE Bi-directional Flow Control
SEROCCO-M
TxD
RTS
RxD
CTS
RS232c Signals
(drivers not shown)
101
DTE
Detailed Protocol Description
TxD
RTS
CTS
RxD
SEROCCO-M
B
ITS08517
PEB 20532
PEF 20532
2000-09-14