PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 59

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Figure 21
Note: The transmit time slot delay and width is programmable via bit fields ’TTSN’, ’TCS’
Data Sheet
and ’TCC’ in registers TTSA0..TTSA3.
The receive time slot delay and width is programmable via bit fields ’RTSN’, ’RCS’
and ’RCC’ in registers RTSA0..RTSA3.
clock mode 5a
TS-Control
rx strobe
tx strobe
Clock Mode 5a Configuration
internal
internal
RxCLK
TxCLK
FSC
RxD
TxD
n
Ctrl.
Time Slot
Assigner
(TSA)
0
TS delay
Ctrl.
1
2
RxCLK
CTS, CxD, TCG
CD, FSC, RCG
TxCLK
RTS
RxD
TxD
TS delay
...
TS width
59
time slot indicator signal
TS width
Functional Overview
clock supply
1
n
PEB 20532
PEF 20532
0
2000-09-14
1