PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 231

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Data Sheet
CRCOK
RAB
HA(1:0)
SU(1:0)
CRC Compare/Check
CRCOK=’0’
CRCOK=’1’
Receive Message Aborted
RAB=’0’
RAB=’1’
High Byte Address Compare
Significant only if an address mode with automatic address handling has
been selected. In operating modes which provide high byte address
recognition, SEROCCO-M compares the high byte of a 2-byte address
with the contents of two individually programmable addresses (RAH1,
RAH2) and the fixed values FE
Dependent on the result of this comparison, the following bit
combinations are possible:
HA(1:0)=’10’
HA(1:0)=’00’
HA(1:0)=’01’ broadcast address has been recognized.
If
HA(1:0)=’10’.
SS7 Signaling Unit Type
If Signaling System #7 support is activated (see
’ESS7’), the bit functions are defined as follows:
SU(1:0)=’00’ not valid
SU(1:0)=’01’ Fill In Signaling Unit (FISU) detected
SU(1:0)=’10’ Link Status Signaling Unit (LSSU) detected
SU(1:0)=’11’ Message Signaling Unit (MSU) detected
RAH1
and
RAH2
CRC check failed, received frame contains errors.
CRC check OK; the received frame does not contain CRC
errors.
No abort condition was detected during reception of the
frame.
The received frame was aborted from the transmitting
station. According to the HDLC protocol, this frame must
be discarded by the receiver station.
This bit is also set to ’1’ if the maximum receive byte count
(set in registers RLCRL/RLCRH) is reached.
RAH1
RAH2
contain identical values, a match is indicated by
has been recognized.
has been recognized.
231
H
and FC
H
(broadcast address).
CCR3L
Register Description
register, bit
(hdlc modes)
(hdlc modes)
(hdlc modes)
(hdlc modes)
PEB 20532
PEF 20532
2000-09-14