PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 271

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Table 25
No. Parameter
Transmit
data rates
100 Clock
101 TxD to TxCLK delay (NRZ, NRZI encoding)
102 TxD to TxCLK delay (FM0, FM1, Manchester
103 TxD to TxCLK(out) delay (output function enabled) 10
104 CxD to TxCLK setup time
105 CxD to TxCLK hold time
106 RTS to TxCLK delay (not bus configuration mode)
Data Sheet
period
encoding)
CTS to TxCLK setup time
CTS to TxCLK hold time
RTS to TxCLK delay (bus configuration mode)
Transmit Cycle Timing
externally clocked
internally clocked
(DPLL modes)
internally clocked
(non DPLL modes)
externally clocked
internally clocked
(DPLL modes)
internally clocked
(non DPLL modes)
240
min.
0
0
0
62
480
62
5
5
5
5
Electrical Characteristics
Limit Values
max.
2
16
¥
¥
¥
25
25
20
20
16
25
PEB 20532
PEF 20532
2000-09-14
Unit
Mbit/s
Mbit/s
Mbit/s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns