PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 17

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

PEB 20532
PEF 20532
Introduction
1
Introduction
The SEROCCO-M is a Serial Communication Controller with two independent serial
1)
channels
. The serial channels are derived from updated protocol logic of the ESCC and
DSCC4 device family providing a large set of protocol support and variety in serial
interface configuration. This allows easy integration to different environments and
applications.
A generic 8- or 16-bit multiplexed/demultiplexed slave interface provides fast device
access with low bus utilization and easy software handshaking. DMA handshake control
signals allow connection to an external DMA controller.
Large on-chip FIFOs of 64 byte capacity per port and direction in combination with
enhanced threshold control mechanisms allow decoupling of traffic requirements on host
bus and serial interfaces with little exception probabilities such as data underruns or
overflows.
Each of the two Serial Communication Controllers (SCC) contains an independent Baud
Rate Generator, DPLL and programmable protocol processing (HDLC, PPP, ASYNC
and BISYNC). Data rates of up to 16 Mbit/s (HDLC, PPP, bit transparent) and 2 Mbit/s
(DPLL assisted modes) are supported. The channels can also handle a large set of
layer-2 protocol functions (LAPD, SS7) reducing bus and host CPU load. Two channel
specific timers are provided to support protocol functions.
1)
The serial channels are also called ’ports’ or ’cores’ depending on the context.
Data Sheet
17
2000-09-14