PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 86

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Figure 40
Figure 41
Figure 42
Data Sheet
to RFIFO
to RFIFO
to RFIFO
registers
registers
registers
involved
involved
involved
HDLC Receive Data Processing in Address Mode 2 (16 bit)
HDLC Receive Data Processing in Address Mode 2 (8 bit)
HDLC Receive Data Processing in Address Mode 1
FLAG
FLAG
FLAG
compare)
compare)
(address
(address
RAH1,2
RAH1,2 RAL1,2
ADDR
opt. 1)
RAL1,2
ADDR
opt. 1)
(high)
16 bit ADDR
(low)
8 bit
8 bit
16 bit ADDR
compare)
option 1)
(address
(low)
data
data
data
86
CRC16
CRC16
option 2)
option 2)
CRC16
Detailed Protocol Description
/32
/32
option 2)
RSTA
RSTA
FLAG
RSTA
RSTA
FLAG
/32
RSTA
RSTA
FLAG
PEB 20532
PEF 20532
2000-09-14