PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 155

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Data Sheet
Register 23
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 24
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
H
A
B
H
A
B
CRL
7
7
0
0
0
0
0
CCR1L
Channel Configuration Register 1 (Low Byte)
CCR1H
Channel Configuration Register 1 (High Byte)
C32
ICD
ICD
ICD
6
6
0
0
read/write
00
Channel A
18
written by CPU;
read and evaluated by SEROCCO-M
read/write
00
Channel A
19
written by CPU;
read and evaluated by SEROCCO-M
H
H
H
H
5
5
0
0
0
0
0
SOC(1:0)
Channel B
68
Channel B
69
H
H
RTS
RTS
RTS
5-155
4
4
0
0
misc.
misc.
SFLG
FRTS
FRTS
FRTS
3
3
0
0
Register Description (CCR1L)
FCTS
FCTS
FCTS
DIV
DIV
DIV
2
2
ODS
ODS
ODS
CAS
CAS
CAS
1
1
PEB 20532
PEF 20532
2000-09-14
TSCM
TSCM
TSCM
0
0
0
0
0