PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 256

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Figure 62
Data Sheet
Packet 1, Fragment 1:
Packet 1, Fragment 2:
Packet 2, Fragment 1:
(se t m ax. re ceive bu ffe r s ize to 1 28 bytes
Fragmented Reception Sequence (Example)
(pre pa re extern al D M A controlle r
w ith rece ive b uffer sta rt a dd re ss)
(p re pa re exte rn al D M A co ntrolle r
w ith re ceive b uffe r s tart a ddress )
(p re pa re exte rn al D M A co ntrolle r
w ith re ceive b uffe r s tart a ddress )
CPU / MEMORY
D M A tra nsfe r of 1 28
an d issue 'R E ' com m a nd )
D M A tran sfer of 71
rece ive data b yte s
rece ive data b yte s
(iss ue 'R M C ' com m a nd )
(issu e 'R E ' c om m a nd )
(re ad R B C register)
R D T E interrup t
R B F interrup t
256
...
3 2
3 2
3 2
3 2
3 2
3 2
7
R M B S
R F IF O
R F IF O
R F IF O
R F IF O
R M B S
R F IF O
R F IF O
R F IF O
R B C
C M D R
SEROCCO-M
Programming
PEB 20532
PEF 20532
2000-09-14