PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 126

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Data Sheet
Register 4
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 5
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
7
7
0
1
GP6DIR
GPDIRL
GPP Direction Register (Low Byte)
GPDIRH
GPP Direction Register (High Byte)
6
6
0
read/write
07
04
written by CPU, evaluated by SEROCCO-M
read/write
FF
05
written by CPU evaluated by SEROCCO-M
H
H
H
H
5
5
0
1
GPP I/O Direction Control
GPP I/O Direction Control
5-126
4
4
0
1
3
3
0
1
Register Description (GPDIRL)
GP10DIR GP9DIR
GP2DIR
2
2
GP1DIR
1
1
PEB 20532
PEF 20532
2000-09-14
GP8DIR
GP0DIR
0
0