PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 69

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PEF 20532 F V1.3

Manufacturer Part Number
PEF 20532 F V1.3
Description
IC COMM CTRLR 2CH SER TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20532 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20532FV1.3X
PEF20532FV13XP
SP000007511
Figure 28
Figure 29
Data Sheet
DPLL
Count
Correction
DPLL
Output
DPLL
Count
Correction
DPLL
Output
DPLL Algorithm (NRZ and NRZI Encoding, Phase Shift Enabled)
DPLL Algorithm (NRZ and NRZI Encoding, Phase Shift Disabled)
0
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0
1
2
+PA
3
+PA
4
5
69
6
Bit Cell
Bit Cell
7
PS
8
9 10 11 12 13 14 15
-PA
Functional Overview
-PA
ITD04820
PEB 20532
PEF 20532
0
2000-09-14
ITD01806
0

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