PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 265

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

7.7.1.3
Figure 67
Figure 68
Data Sheet
LDS, UDS
LDS, UDS
D(15:8)
(1) Signals LDS, UDS and D(15:8) only available in 16-bit Motorola bus mode
(2) Interrupt signal shown is push-pull, active high. Same timings apply to push-pull, active low interrupt
(1) Signals LDS, UDS and D(15:8) only available in 16-bit Motorola bus mode
D(15:8)
DTACK
A(7:1)
DTACK
A(7:1)
D(7:0)
A(7:0)
signal. In case of open-drain output the timing depends on external components.
D(7:0)
A(7:0)
INT
R/W
R/W
CS
DS
CS
DS
1)
1)
1)
1)
1)
2)
1)
Motorola Bus Interface Timing
Motorola Read Cycle Timing
Motorola Write Cycle Timing
52a
52a
40
40
44
44
42
42
48
52
52
47
234
46
50
49
49a
51
41
45
41
Electrical Characteristics
43
54
43
53
45
53
55
55
PEB 20532
PEF 20532
53a
53a
2000-09-14