PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 158
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PEF 20532 F V1.3
Manufacturer Part Number
PEF 20532 F V1.3
Description
IC COMM CTRLR 2CH SER TQFP-100
Manufacturer
Infineon Technologies
Datasheet
1.PEB_20532_F_V1.3.pdf
(282 pages)
Specifications of PEF 20532 F V1.3
Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20532FV1.3X
PEF20532FV13XP
SP000007511
PEF20532FV13XP
SP000007511
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Data Sheet
FRTS
FCTS
Flow Control (using signal RTS)
Bit ’FRTS’ together with bit ’RTS’ determine the function of signal RTS:
RTS, FRTS
0,
0,
1,
1,
Flow Control (using signal CTS)
This bit controls the function of pin CTS.
FCTS = ’0’
FCTS = ’1’
0
1
0
1
Pin RTS is controlled by SEROCCO-M autonomously.
RTS is activated (low) as soon as transmit data is
available within the SCC transmit FIFO.
Pin RTS is controlled by SEROCCO-M autonomously
supporting bi-directional data flow control.
RTS is activated (low) if the shadow part of the SCC
receive FIFO is empty and de-activated (high) when the
SCC receive FIFO fill level reaches its receive FIFO
threshold.
Forces pin RTS to active state (low).
Forces pin RTS to inactive state (high).
The transmitter is stopped if CTS input signal is inactive
(high) and enabled if active (low).
Note: In the character oriented protocol modes (ASYNC,
The transmitter is enabled, disregarding CTS input signal.
BISYNC, asynchronous PPP), the current byte is
completely sent even if CTS becomes inactive
during transmission.
5-158
Register Description (CCR1H)
PEB 20532
PEF 20532
(all modes)
(all modes)
2000-09-14
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