PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 214

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Data Sheet
MXON(7:0)
MXOFF(7:0) XOFF Character Mask
XON Character Mask
Setting a bit in this bit field to ’1’ masks the corresponding bit in bit field
’XON(7:0)’ of register XON. A masked bit position always matches when
comparing the received character with bit field ’XON(7:0)’.
bit = ’0’
bit = ’1’
Setting a bit in this bit field to ’1’ masks the corresponding bit in bit field
’XOFF(7:0)’ of register XOFF. A masked bit position always matches
when comparing the received character with bit field ’XOFF(7:0)’.
bit = ’0’
bit = ’1’
The dedicated bit position is NOT masked. This bit
position in the received character must match with the
corresponding bit position in bit field ’XON’ to recognize
the received character as an XON character.
The dedicated bit position is masked. This bit position in
the received character NEED NOT match with the
corresponding bit position in bit field ’XON’ to recognize
the received character as an XON character.
The dedicated bit position is NOT masked. This bit
position in the received character must match with the
corresponding bit position in bit field ’XOFF’ to recognize
the received character as an XOFF character.
The dedicated bit position is masked. This bit position in
the received character NEED NOT match with the
corresponding bit position in bit field ’XOFF’ to recognize
the received character as an XOFF character.
5-214
Register Description (MXOFF)
(async mode)
(async mode)
PEB 20532
PEF 20532
2000-09-14