PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 275

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PEF 20532 F V1.3

Manufacturer Part Number
PEF 20532 F V1.3
Description
IC COMM CTRLR 2CH SER TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20532 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20532FV1.3X
PEF20532FV13XP
SP000007511
7.7.3
Figure 78
Table 29
No.
150
151
Note: RESET may be asserted and deasserted asynchronous to CLK at any time.
Data Sheet
Parameter
RESET pulse width
Number of CLK cycles after
RESET inactive
Reset Timing
RESET
VDD3
Reset Timing
Reset Timing
CLK
power-on
244
min.
500
2
150
Limit Values
Electrical Characteristics
max.
151
PEB 20532
PEF 20532
2000-09-14
Unit
ns
CLK
cycles

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