PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 141

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Data Sheet
Register 17
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 18
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
H
A
B
H
A
B
XREPE
XREPE
XREPE
7
7
0
0
0
Command Status
STARL
Status Register (Low Byte)
STARH
Status Register (High Byte)
RFNE
RFNE
6
6
updated by SEROCCO-M
0
0
0
updated by SEROCCO-M
0
read only
00
Channel A
12
read and evaluated by CPU
read only
10
Channel A
13
read and evaluated by CPU
H
H
H
H
Receiver Status
TEC
CD
CD
CD
5
5
0
0
Channel B
62
Channel B
63
H
H
SYNC
CEC
CEC
CEC
RLI
5-141
4
4
0
DPLA
DPLA
DPLA
FCS
3
3
0
0
Register Description (STARL)
Transmitter Status
XDOV
XDOV
XDOV
WFA
2
2
0
0
Automode Status
XRNR
XFW
XFW
XFW
1
1
0
0
PEB 20532
PEF 20532
2000-09-14
RRNR
CTS
CTS
CTS
0
0
0
0