PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 40

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PEF 20532 F V1.3

Manufacturer Part Number
PEF 20532 F V1.3
Description
IC COMM CTRLR 2CH SER TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20532 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20532FV1.3X
PEF20532FV13XP
SP000007511
Table 6
Pin No.
Data Sheet
P-TQFP-
100-3
3, 15,
21, 27,
35, 40,
47, 49,
56, 62,
70, 76,
82, 92,
98
4, 16,
22, 28,
34, 41,
48, 50,
51, 57,
63, 71,
77, 83,
93
9
6
-
Power Pins
Symbol In (I)
V
V
V
V
N.C.
DD3
SS
DDA
SSA
Out (O)
-
-
-
-
-
Function
Digital Supply Voltage 3.3 V ± 0.3 V
All pins must be connected to the same voltage
potential.
Digital Ground (0 V)
All pins must be connected to the same voltage
potential.
Analog Supply Voltage 3.3 V ± 0.3 V
This pin supplies the on-chip oscillator of the
SEROCCO-M. If no separate analog power
supply is available, this pin can be directly
connected to V
Analog Ground (0 V)
This pin supplies the ground level to the on-chip
oscillator of the SEROCCO-M. If no separate
analog power supply is available, this pin can be
directly connected to V
Not Connected
40
DD3
.
SS
.
Pin Descriptions
PEB 20532
PEF 20532
2000-09-14

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