PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 168

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PEF 20532 F V1.3

Manufacturer Part Number
PEF 20532 F V1.3
Description
IC COMM CTRLR 2CH SER TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20532 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20532FV1.3X
PEF20532FV13XP
SP000007511
Data Sheet
ELC
TCDE
AFX
Enable Length Check
This bit is only valid in HDLC SS7 mode:
If the number of received octets exceeds 272 + 7 within one Signaling
Unit, reception is aborted and bit RSTA.RAB is set.
ELC=’0’
ELC=’1’
Termination Character Detection Enable
This bit is valid in ASYNC/BISYNC modes only and enables/disables the
termination character detection mechanism:
TCDE = ’0’
TCDE = ’1’
Automatic FISU Transmission
This bit is only valid in HDLC SS7 mode:
After the contents of the transmit FIFO (XFIFO) has been transmitted
completely, FISUs are transmited automatically. These FISUs contain
the FSN and BSN of the last transmitted Signaling Unit (provided in
XFIFO).
AFX=’0’
AFX=’1’
Length Check disabled.
Length Check enabled.
No receive termination character detection is performed.
The termination character detection is enabled. The
receive data stream is monitored for the occurence of a
termination character (TC) programmed via register TCR.
When this character is detected, a ’TCD’ interrupt is
generated to the CPU (unless masked).
Note: If the programmed character length (bit field
Automatic FISU transmission disabled.
Automatic FISU transmission enabled.
’CHL(1:0)’) is less than 8 bits, the most significant
unused bits in register
Otherwise
detected.
5-168
no
termination
Register Description (CCR3H)
TCR
(async/bisync modes)
must be set to ’0’.
character
PEB 20532
PEF 20532
(hdlc mode)
(hdlc mode)
2000-09-14
will
be

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