PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 238

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Register 90
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 91
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Data Sheet
Bit
Bit
RE
15
7
DRMBS
Receive Maximum Buffer Size (Low Byte)
Receive Maximum Buffer Size (High Byte)
RMBSL
RMBSH
14
6
read/write
00
Channel A
C4
written by CPU, evaluated by SEROCCO-M
read/write
00
Channel A
C5
written by CPU, evaluated by SEROCCO-M
H
H
H
H
13
5
0
Receive Maximum Buffer Size
Receive Maximum Buffer Size
Channel B
DE
Channel B
DF
H
H
12
4
0
238
RMBS(7:0)
11
3
10
2
RMBS(11:8)
Register Description
1
9
PEB 20532
PEF 20532
2000-09-14
0
8