PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 154

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Data Sheet
SC(2:0)
SM(1:0)
Serial Port Configuration
This bit field selects the line coding of the serial port.
Note, that special operation modes and settings may require or exclude
operation in special line coding modes. Refer to the ’prerequisites’ in the
dedicated mode descriptions.
SC = ’000’
SC = ’001’
SC = ’010’
SC = ’011’
SC = ’100’
SC = ’101’
SC = ’110’
SC = ’111’
Note: If bus configuration mode is selected, only NRZ data encoding is
Serial Port Mode
This bit field selects one of the three protocol engines.
Depending on the selected protocol engine the SCC related registers
change or special bit positions within the registers change their meaning.
SM = ’00’
SM = ’01’
SM = ’10’
SM = ’11’
supported.
NRZ data encoding
Bus configuration, timing mode 1 (NRZ data encoding)
NRZI data encoding
Bus configuration, timing mode 2 (NRZ data encoding)
FM0 data encoding
FM1 data encoding
Manchester data encoding
Reserved
HDLC/PPP protocol engine
Reserved
(do not use)
BISYNC protocol engine
ASYNC protocol engine
5-154
Register Description (CCR0H)
PEB 20532
PEF 20532
(all modes)
(all modes)
2000-09-14