PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 274

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PEF 20532 F V1.3

Manufacturer Part Number
PEF 20532 F V1.3
Description
IC COMM CTRLR 2CH SER TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20532 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20532FV1.3X
PEF20532FV13XP
SP000007511
7.7.2.6
Figure 77
Table 28
No. Parameter
130 Sync pulse to RxCLK setup time
131 Sync pulse to RxCLK hold time
132 TxCLKout to RxCLK delay (time slot monitor)
Data Sheet
(1) Normal operation and bus configuration mode 1
(2) Bus configuration mode 2
RxCLK
TxCLK
TxCLK
Clock Mode 5 Frame Synchronisation Timing
(FSC)
Note1
Note2
CD
Clock Mode 5 Frame Synchronisation Timing
Clock Mode 5 Frame Synchronisation Timing
132
132
243
132
130
min.
10
0
10
Electrical Characteristics
132
131
Limit Values
max.
27
PEB 20532
PEF 20532
2000-09-14
Unit
ns
ns
ns

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