PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 259

no-image

PEF 20532 F V1.3

Manufacturer Part Number
PEF 20532 F V1.3
Description
IC COMM CTRLR 2CH SER TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20532 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20532FV1.3X
PEF20532FV13XP
SP000007511
7.4
Interface Pins
T
Inputs are driven to 2.4 V for a logical “1” and to 0.4 V for a logical “0”. Timing
measurements are made at 2.0 V for a logical “1” and at 0.8 V for a logical “0”.
The AC testing input/output waveforms are shown below.
Figure 60
7.5
Interface Pins
Table 18
Parameter
Input capacitance
Output capacitance
I/O-capacitance
Data Sheet
A
= 0 to + 70 °C;
2.4
0.45
AC Characteristics
Capacitances
Input/Output Waveform for AC Tests
Capacitances
T
A
2.0
0.8
= 25 ° C;
V
DD3
Test Points
Symbol
C
C
C
= 3.3 V ± 0.3 V
IN
OUT
IO
V
DD3
= 3.3 V ± 0.3 V,
2.0
0.8
min.
Limit Values
228
max.
5
10
15
V
SS
= 0 V
Device
Under
Test
Unit
pF
pF
pF
Electrical Characteristics
Test Condition
C
Load
PEB 20532
PEF 20532
= 50 pF
ITS09800
2000-09-14

Related parts for PEF 20532 F V1.3