PEF 20532 F V1.3 Infineon Technologies, PEF 20532 F V1.3 Datasheet - Page 110

• Manufacturer Part Number: PEF 20532 F V1.3
• Description: IC COMM CTRLR 2CH SER TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20532 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Automatic Flag Detection and Transmission, Baud Rate Generator, On-Chip Clock Generation, Receive Line Status Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20532FV1.3X; PEF20532FV13XP; SP000007511

Examples
The interaction between SCC and the host during transmission and reception of I-frames
is illustrated in the following two figures. The flow control with RR/RNR of I-frames during
transmission/reception is illustrated in
and protocol errors are shown in
Figure 52
Figure 53
Data Sheet
ALLS
RME
ALLS
RME
WFA
WFA
RME
RR
RNR
XRNR
Transmission/Reception of I-Frames and Flow Control
Flow Control: Reception of S-Commands and Protocol Errors
I
I (0.1)
I
I
RR(1)
RR(1)
RR(2)
(0.0)
(1.1)
(1.2)
RR(0)p=1
RR(0)p=1
I (0.0)
RNR(0)
I
RR(1)
RR(0)f=1
RR(0)f=1
(0.0)
WFA = Wait For Acknowledge (see Status Register)
Transmit
Transmit
Confirm
Reception
WFA = Wait For Acknowledge (see Status Register)
Figure
with
I
I
I
Frame
Frame
Frame
I Frame
Figure
53.
110
52. Both, the sequence of the poll cycle
ALLS
ALLS
PCE
TIN
RSC (RNR)
XMR
ALLS
RSC (RR)
WFA
WFA
Detailed Protocol Description
WFA
t1
t1
t1
t1
t1
RR(0)
Protocol Error
RNR(0)f=1
RR(1)
RR(2)
RNR(0)
RR(0)f=1
Poll Cycle
I
RR(0)p=1
RR(0)p=1
RRp=1
RRp=1
(0.0)
I (0.0)
RR(0)p=1
PEB 20532
PEF 20532
2000-09-14
RNR