HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1057

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
5
4
Bit Name
ORER
ERS
Initial
Value
0
0
R/W
R/W
R/W
Description
Overrun Error
Indicates that an overrun error occurred during reception,
resulting in abnormal termination.
0: Indicates that reception is in progress, or that reception
[Clearing conditions]
•
•
1: Indicates that an overrun error occurred during reception*
[Setting condition]
When the RDRF bit is set to 1 and the next serial reception
is completed.
Notes:
Error Signal Status
Indicates the status of error signals returned from the receive
side during transmission. In T = 1 mode, this flag is not set.
0: Indicates that an error signal indicating detection of a
[Clearing conditions]
•
•
1: Indicates that an error signal indicating detection of a
[Setting condition]
When an error signal is sampled.
Note:
parity error was not sent from the receive side
parity error was sent from the receive side
was completed normally*
On reset
When 0 is written to the ORER bit
On reset
When 0 is written to the ERS bit
Even if the TE bit in SCSCR is cleared to 0, the
ERS flag is unaffected, and the previous state is
retained.
1. When the RE bit in SCSCR is cleared to 0, the
2. In SCRDR, the received data before the overrun
ORER flag is unaffected and the previous state is
retained.
error occurred is lost, and the data that had been
received at the time when the overrun error
occurred is retained. Further, with the ORER bit
set to 1, subsequent serial reception cannot be
continued.
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Section 30 SIM Card Module (SIM)
Page 997 of 1414
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