HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1117

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
31.3.21 Interrupt Status Register 2 (INTSTR2)
The INTSTR2 controls the MMCIF interrupt output.
If setting condition is satisfied, FRDYI is set even though it has been cleared. Disable flag setting
by FRDYIE in INTCR2 before clearing FRDYI.
Note:
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
7 to 2
1
0
* Cleared by writing 0 after reading 1.
Bit Name
⎯
FRDY_TU 1
FRDYIE
Initial
Value
All 0
0
R/W
⎯
R
R/(W)* FIFO Preparation End Flag Enable
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
When FRDYI setting condition is satisfied.
Read value
0: When FIFO remained data is less than data set as
1: When FIFO remained data is other than data set as
[Setting condition]
When FIFO remained data is less than data set as assert
condition by DMACR while FRDYIE = 1 and the DMAEN
bit is set.
[Clearing condition]
Write 0 after reading FRDYI = 1.
assert condition by DMACR
assert condition by DMACR
Section 31 MultiMediaCard Interface (MMCIF)
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