HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 639

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
17.3.17 RTC Control Register 2 (RCR2)
RCR2 is a register for periodic interrupt control, 30-second adjustment ADJ, divider circuit
RESET, and RTC count control.
RCR2 is initialized to H'09 by a power-on reset. It is initialized except for RTCEN and START by
a manual reset. It is not initialized in standby mode, and retains its contents.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
7
6
5
4
Bit Name
PEF
PES2
PES1
PES0
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Indicates interrupt generation with the period
designated by the PES2 to PES0 bits. When set
to 1, PEF generates periodic interrupts.
0: Interrupts not generated with the period
1: Interrupts generated with the period
Interrupt Enable Flags
These bits specify the periodic interrupt.
000: No periodic interrupts generated
001: Periodic interrupt generated every 1/256
010: Periodic interrupt generated every 1/64
011: Periodic interrupt generated every 1/16
100: Periodic interrupt generated every 1/4
101: Periodic interrupt generated every 1/2
110: Periodic interrupt generated every 1 second
111: Periodic interrupt generated every 2
Periodic Interrupt Flag
designated by the bits PES2 to PES0.
[Clearing condition] When 0 is written to PEF
designated by the PES2 to PES0 bits.
[Setting condition] When an interrupt is
generated with the period designated by the
bits PES0 to PES2 or when 1 is written to the
PEF flag
seconds
second
second
second
second
second
Section 17 Realtime Clock (RTC)
Page 579 of 1414

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