HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 19

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

18.6
Section 19 Infrared Data Association Module (IrDA).......................................641
19.1
19.2
19.3
19.4
Section 20 I
20.1
20.2
20.3
20.4
20.5
20.6
20.7
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Usage Notes ...................................................................................................................... 639
Features............................................................................................................................. 641
Input/Output Pins.............................................................................................................. 642
Register Description.......................................................................................................... 642
19.3.1
Operation .......................................................................................................................... 644
19.4.1
19.4.2
19.4.3
Features............................................................................................................................. 647
Input/Output Pins.............................................................................................................. 650
Register Descriptions ........................................................................................................ 650
20.3.1
20.3.2
20.3.3
20.3.4
20.3.5
20.3.6
20.3.7
20.3.8
20.3.9
20.3.10 I
Operation .......................................................................................................................... 662
20.4.1
20.4.2
20.4.3
20.4.4
20.4.5
20.4.6
20.4.7
Interrupt Request............................................................................................................... 676
Bit Synchronous Circuit.................................................................................................... 677
Usage Notes ...................................................................................................................... 678
2
C Bus Interface (IIC) .....................................................................647
IrDA Mode Register (SCIMR) ......................................................................... 642
Transmitting...................................................................................................... 644
Receiving .......................................................................................................... 644
Data Format Specification ................................................................................ 645
I
I
I
I
I
Slave Address Register (SAR) .......................................................................... 659
I
I
I
I
Master Transmit Operation ............................................................................... 663
Master Receive Operation................................................................................. 665
Slave Transmit Operation ................................................................................. 667
Slave Receive Operation................................................................................... 669
Noise Canceller................................................................................................. 671
Example of Use................................................................................................. 671
2
2
2
2
2
2
2
2
2
2
C Bus Control Register 1 (ICCR1) ................................................................. 651
C Bus Control Register 2 (ICCR2) ................................................................. 652
C Bus Mode Register (ICMR) ........................................................................ 653
C Bus Interrupt Enable Register (ICIER) ....................................................... 655
C Bus Status Register (ICSR)......................................................................... 657
C Bus Transmit Data Register (ICDRT)......................................................... 660
C Bus Receive Data Register (ICDRR) .......................................................... 660
C Bus Shift Register (ICDRS) ........................................................................ 660
C Bus Master Transfer Clock Select Register (ICCKS) ................................. 660
C Bus Format.................................................................................................. 662
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