HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1114

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Section 31 MultiMediaCard Interface (MMCIF)
31.3.16 VDD/Open-Drain Control Register (VDCNT)
VDCNT can use MMC_ODMOD signal to control open drain. The MMC_VDDON signal output
can be used to control the MMC power supply (VDD) on/off.
31.3.17 Data Register (DR)
DR is a register for reading/writing FIFO data.
Word/byte access is enabled to addresses of this register.
Page 1054 of 1414
Bit
7
6
5 to 0
Bit
15 to 0
(7 to 0)
Bit Name
VDDON
ODMOD
Bit Name
DR
Initial
Value
0
0
All 0
Initial
Value
Undefined
R/W
R/W
R/W
R/W
R/W
Description
Specifies MMC_VDDON signal to be used as a MMC
power supply (VDD) control signal.
0: MMC_VDDON is low signal output
1: MMC_VDDON is high signal output
Specifies MMC_ODMOD signal to be used to control
CMD output open drain in MMC mode.
0: MMC_ODMOD signal is low signal output
1: MMC_ODMOD signal is high signal output
Reserved
These bits are always read as 0. The write value should
always be 0.
Description
Register for reading/writing FIFO data.
Word/byte access is enabled. However, byte access is
disabled to address 2n+1.
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010

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