HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 944

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Section 26 LCD Controller (LCDC)
26.3.14 LCDC Vertical Sync Signal Register (LDVSYNR)
LDVSYNR specifies the vertical (scan direction and vertical direction) sync signal timing of the
LCD module.
Page 884 of 1414
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
VSYNW3
VSYNW2
VSYNW1
VSYNW0
VSYNP10
VSYNP9
VSYNP8
VSYNP7
VSYNP6
VSYNP5
VSYNP4
VSYNP3
VSYNP2
VSYNP1
VSYNP0
Initial Value
0
0
0
0
0
0
0
1
1
1
0
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Vertical Sync Signal Width
Set the width of the vertical sync signals (FLM and
Vsync) (unit: line).
Specify to the value of (the vertical sync signal
width) -1.
Example: For a vertical sync signal width of 1 line.
Reserved
This bit is always read as 0. The write value
should always be 0.
Vertical Sync Signal Output Position
Set the output position of the vertical sync signals
(FLM and Vsync) (unit: line).
Specify to the value of (the number of vertical sync
signal output position) -2.
DSTN should be set to an odd number value. It is
handled as (setting value+1)/2.
Example: For an 480-line LCD module and a
vertical retrace period of 0 lines (in other words,
VTLN=479 and the vertical sync signal is active for
the first line):
Single display
VSYNP = [(1-1)+VTLN]mod(VTLN+1)
Dual displays
VSYNP = [(1-1)×2+VTLN]mod(VTLN+1)
VSYNW = (1-1) = 0 = H'0
= [(1-1)+479]mod(479+1)
= 479mod480 = 479 =H'1DF
= [(1-1)×2+479]mod(479+1)
= 479mod480 = 479 =H'1DF
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010

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