HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 671
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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SH7720 Group, SH7721 Group
18.3.10 FIFO Control Register (SCFCR)
SCFCR is a 16-bit readable/writable register that resets the number of data in the transmit and
receive FIFO registers, sets the number of trigger data, and contains an enable bit for the loop back
test.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
15
14
13 to 11 ⎯
10
9
8
Bit Name
TSE
TCRST
RSTRG2
RSTRG1
RSTRG0
Initial Value R/W
0
0
All 0
0
0
0
R/W
R/W
R
R/W
R/W
R/W
Description
Transmit Data Stop Enable
Enables or disables transmit data stop function. This
function is enabled only in asynchronous mode.
Since this function is not supported in synchronous
mode, clear this bit to 0 in synchronous mode.
0: Transmit data stop function disabled
1: Transmit data stop function enabled
Transmit Count Reset
Clears the transmit count to 0. This bit is available
while the transmit data stop function is enabled.
0: Transmit count reset disabled*
1: Transmit count reset enabled (cleared to 0)
Note:
Reserved
These bits are always read as 0. The write value
should always be 0.
Trigger of the RTS Output Active 2 to 0
The RTS signal goes to high, when the number of
receive data count stored in the receive FIFO data
register (SCFRDR) is increased more than the
number of setting triggers listed below.
000: 63
001: 1
010: 8
011: 16
100: 32
101: 48
110: 54
111: 60
Section 18 Serial Communication Interface with FIFO (SCIF)
* The transmit count is reset (cleared to 0)
by a power-on reset or manual reset.
Page 611 of 1414
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