HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 661

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
18.3.7
SCFER is a 16-bit read-only register that indicates the number of receive data errors (framing
error/parity error).
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
15,14
13
12
11
10
9
8
7, 6
5
4
3
2
1
0
FIFO Error Count Register (SCFER)
Bit Name
⎯
PER5
PER4
PER3
PER2
PER1
PER0
⎯
FER5
FER4
FER3
FER2
FER1
FER0
Initial value R/W
All 0
0
0
0
0
0
0
All 0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Parity Error
Indicates the number of data, in which parity errors
are generated, in receive data stored in the receive
FIFO data register (SCFRDR) in asynchronous mode.
Bits 13 to 8 indicate the number of data with parity
errors after the ER bit in SCSSR is set.
If all 64-byte receive data in SCFRDR have parity
errors, bits PER5 to PER0 indicate 0s.
Reserved
These bits are always read as 0. The write value
should always be 0.
Framing Error
Indicates the number of data, in which framing errors
are generated, in receive data stored in the receive
FIFO data register (SCFRDR) in asynchronous mode.
Bits 5 to 0 indicate the number of data with framing
errors after the ER bit in SCSSR is set.
If all 64-byte receive data in SCFRDR have framing
errors, bits FER5 to FER0 indicate 0s.
Section 18 Serial Communication Interface with FIFO (SCIF)
Page 601 of 1414