HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 137

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Instruction Code
MSB
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0010
0010
0010
SH7720 Group, SH7721 Group
2.6.2
Table 2.12 shows the operation code map.
Table 2.12 Operation Code Map
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Rn
Rn
Rn
Rn
Rn
Rn
Rm
Rm
Rn
0000
0000
0000
0000
0000
Rn
Rn
Rn
Rn
Rn
Rn
Rn
Rn
Rn
1. Number of states before the chip enters the sleep state.
2. For details, refer to section 7, Exception Handling.
Operation Code Map
Fx
Fx
00MD
01MD
10MD
11MD
00MD
10MD
Rm
00MD
01MD
Fx
Fx
Fx
Fx
Fx
Fx
Fx
Rm
Rm
Rm
Rm
Rm
0000
0001
0010
0010
0010
0010
0011
0011
01MD
1000
1000
1001
1010
1011
1000
1001
1010
1011
11MD
disp
00MD
01MD
10MD
LSB
Fx: 0000
MD: 00
STC
STC
STC
STC
BSRF
PREF
MOV.B
CLRT
CLRS
NOP
RTS
STS
MOV. B
MOV.L
MOV.B
MOV.B
TST
SR, Rn
SPC, Rn
R0_BANK, Rn
R4_BANK, Rn
Rm
@Rm
Rm, @(R0, Rn)
MACH, Rn
@(R0, Rm), Rn
Rm, @Rn
Rm, @–Rn
Rm, Rn
Rm, @(disp:4, Rn)
Fx: 0001
MD: 01
STC
STC
STC
MOV.W
SETT
SETS
DIV0U
SLEEP
STS
MOV.W
MOV.W
MOV.W
AND
GBR, Rn
Rm, @–Rn
Rm, Rn
R1_BANK, Rn
R5_BANK, Rn
Rm, @(R0, Rn)
MACL, Rn
@(R0, Rm), Rn
Rm, @Rn
Fx: 0010
MD: 10
STC
STC
STC
BRA
MOV.L
CLRMAC
RTE
MOVT
STS
MOV.L
MOV.L
MOV.L
XOR
VBR, Rn
R2_BANK, Rn
R6_BANK, Rn
Rm
Rm,@(R0, Rn)
Rn
PR, Rn
@(R0, Rm), Rn
Rm, @Rn
Rm, @–Rn
Rm, Rn
Fx: 0011 to 1111
MD: 11
STC
STC
STC
MUL.L
LDTLB
MAC.L
DIV0S
OR
Page 77 of 1414
Section 2 CPU
SSR, Rn
R3_BANK, Rn
R7_BANK, Rn
Rm, Rn
@Rm+,@Rn+
Rm, Rn
Rm, Rn