HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 686

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 18 Serial Communication Interface with FIFO (SCIF)
Figure 18.10 shows an example of the operation when modem control is used.
Transmit data
TxD
When modem control is enabled, the RTS signal goes high after the number of receive FIFO
(SCFRDR) has exceeded the number of RTS output triggers.
18.4.3
Operation in synchronous mode is described below.
The SCIF has 64-stage FIFO buffers for both transmission and reception, reducing the CPU
overhead and enabling fast, continuous communication to be performed.
The operating clock source is selected using the serial mode register (SCSMR). The SCIF clock
source is determined by the CKE1 and CKE0 bits in the serial control register (SCSCR).
• Transmit/receive format: Fixed 8-bit data
• Indication of the number of data bytes stored in the transmit and receive FIFO registers
• Internal clock or external clock used as the SCIF clock source
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CTS
When the internal clock is selected:
The SCIF operates on the baud rate generator clock and outputs a serial clock from SCK pin.
Transmit data
TxD
RTS
Synchronous Mode
Start
bit
0
Start
bit
D0
0
Figure 18.10 Example of CTS Control Operation
Figure 18.11 Example of RTS Control Operation
Transmission stops
when CTS goes high
D1
D0
RTS goes high when receive data is
at least number of RTS output trigger
D1
D6
D7
D6
Parity
bit
0/1
D7
Stop
bit
Parity
bit
0/1
Stop
bit
RTS goes low when receive data is
less than number of RTS output trigger
Transmission starts again
when CTS goes low
Start
bit
0
D0
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
D1
D6
Sep 21, 2010
D7
0/1