HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1149

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
• After read sequence, FIFO includes data. If necessary, 100 is written to the SET2 to SET0 bits
• The end of the transfer with the DMAC is confirmed, and 0 is set to the DMAEN bit in
• When the CRC error (CRCERI) or the command timeout error (CTERI) occurs during
• When the CRC error (CRCERI) or the data timeout error (DTERI) occurs during read data
Notes: 1. Access from the DMAC the FIFO should be performed by byte or longword data.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
in DMACR to read every data in FIFO.
DMACR.
command response reception, write 1 to the CMDOFF bit and set DMACR to H'00.
reception, write 1 to the CMDOFF bit and set DMACR to H'00 to clear the FIFO.
2. In multiblock transfer, no normal command response can be received if you terminate
the command sequence (by writing 1 in the CMDOFF bit) before the command
response end interrupt (CRPI). To receive a normal command response, you need to
continue the command sequence (by setting the RD_CONTI bit to 1) until the
reception of the command response is completed.
Section 31 MultiMediaCard Interface (MMCIF)
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