HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 901

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
• Data Stage (Control-In)
The application first analyzes command data from the host in the setup stage, and determines the
subsequent data stage direction. If the result of command data analysis is that the data stage is in-
transfer, one packet of data to be sent to the host is written to the FIFO. If there is more data to be
sent, this data is written to the FIFO after the data written first has been sent to the host
(IFR0/EP0i TS = 1).
The end of the data stage is identified when the host transmits an OUT token and the status stage
is entered.
Note: If the size of the data transmitted by the function is smaller than the data size requested by
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
the host, the function indicates the end of the data stage by returning to the host a packet
shorter than the maximum packet size. If the size of the data transmitted by the function is
an integral multiple of the maximum packet size, the function indicates the end of the data
stage by transmitting a zero-length packet.
Data transmission to host
Set EP0i transmission
(IFR0/EP0i TS = 1)
IN token reception
USB function
in EP0i FIFO?
to TRG/EP0s
complete flag
Valid data
Figure 25.7 Data Stage (Control-In) Operation
1 written
RDFN?
Yes
Yes
ACK
No
No
NAK
NAK
Interrupt request
Clear EP0i transmission
data register (EPDR0i)
data register (EPDR0i)
Write 1 to EP0i packet
Write 1 to EP0i packet
(TRG/EP0i PKTE = 1)
(TRG/EP0i PKTE = 1)
(IFR0/EP0i TS = 0)
Section 25 USB Function Controller (USBF)
Write data to EP0i
Write data to EP0i
From setup stage
complete flag
Application
enable bit
enable bit
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